Telspan Data

Telspan Data is a leader in ground-based and ruggedized telemetry technologies. They design and manufacture ruggedized recorders, switches, gateways & TAPs along with telemetry ground systems & “data fusion” software. Their Multi-Disciplined product architecture leverages open standards and the latest SoC, data transmission and processing technologies. These products give Instrumentation & Test Engineers unparalleled flexibility and capability as the testing requirements change and grow.

Their rugged airborne hardware systems and ground products are used by aerospace, military and government customers on many high visibility test and operational programs.

The Modular Instrumentation TAP Recorder (MITR) is a high-bandwidth, high-capacity IRIG 106 Chapter 10 data recorder/ publisher with a TAP Interface Module (TIM) & multiple Tera-Bytes of high-speed removable storage. MITR is suitable for a wide range of data recording requirements in harsh & demanding environments.

MITR 5510’s configurable Copper or Fiber TIM provides protocol independent full duplex transceivers. Applications include Ethernet, Fibre Channel, AS5643 IEEE-1394B (Firewire), IRIG 818, or any specific communication application. Input channels are recorded/published while mirrored outputs provide full active TAP capabilities. TAP components are powered via primary or auxiliary 28VDC.

The Removable Memory Module, RMM, consists of 1 to 3 drives in a single carrier supporting recording bandwidths to 1.5GBps and up to 48TB. With data security and throughput in mind, 3 independent data paths (from inputs to disks) allow individual data channels to be written to individual drives. Each carrier includes a built-in power and a 10GE download port eliminating the need for expensive, standalone debrief stations.

MITR also contains a Layer 2/3 Managed Ethernet Switch with (4) external interfaces, a GPS receiver & IRIG Time Code Generator. The hardware based IEEE-1588v2 time engine provides multiple Grand Master, Master, Slave & Transparent clock capabilities. The 4 external Ethernet interfaces can be used for IRIG 106 Chapter 10 data publishing, command/control or as a fully capable Layer 2/3 Managed Switch. Any/all external Ethernet interfaces can also be recorded. A CH7 PCM Encoder/Decoder provides connection to a Telemetry transmitter.

The Modular Instrumentation TAP Recorder (MITR) is a high-bandwidth, high-capacity IRIG 106 Chapter 10 data recorder/ publisher with a TAP Interface Module (TIM) & multiple Tera-Bytes of high-speed removable storage. MITR is suitable for a wide range of data recording requirements in harsh & demanding environments.

The Removable Memory Module, RMM, consists of 1 to 3 drives in a single carrier supporting recording bandwidths to 1.5GBps and up to 48TB. With data security and throughput in mind, 3 independent data paths (from inputs to disks) allow individual data channels to be written to individual drives. Each carrier includes a built-in power and a 10GE download port eliminating the need for expensive, standalone debrief stations.

MITR 5520 TAP Interface Module (TIM) provides up to 8 channels of 1G copper Fibre Channel using Quadrax connectors . Input channels can be filtered, recorded and published while mirrored outputs provide full active TAP capabilities. TAP components are powered via primary or auxiliary 28VDC.

MITR also contains a Layer 2/3 Managed Ethernet Switch with (4) external interfaces, a GPS receiver & IRIG Time Code Generator. The hardware based IEEE-1588v2 time engine provides multiple Grand Master, Master, Slave & Transparent clock capabilities. The 4 external Ethernet interfaces can be used for IRIG 106 Chapter 10 data publishing, command/control or as a fully capable Layer 2/3 Managed Switch. Any/all external Ethernet interfaces can also be recorded. A CH7/HDLC PCM Encoder/Decoder provides connection to a Telemetry transmitter.

The CPAS-5530 Modular Instrumentation TAP Recorder (MITR) is a high-bandwidth, high-capacity IRIG 106 Chapter 10 data recorder/publisher with a modular TAP Interface Module (TIM) & Removable Memory Module (RMM). MITR is suitable for a wide range of data recording requirements in harsh & demanding environments.

The configurable TIM provides protocol independent full duplex 1-10G optical transceivers, MIL-STD-1553, video, audio & PCM channels. Logic driven protocols for optical channels include Ethernet, Fibre Channel, sFPDP, ARINC-818, & other communication transports. Rx input channels are recorded, published & also can be routed to any Tx output channel. MITR supports user configurable Framing & Signaling, Upper-Level Protocol, & Message/Sub-Message filtering of data. Also MIL-STD-1553 message/word level filtering. The filtered data can be published & or transmitted out the IRIG 106 Chapter 7/HDLC PCM outputs.

The integrated Ethernet Switch (iES-6 & 8), are rugged 6 & 8 port layer 2/3 managed gigabit Ethernet switches with end node timing and discrete signal capabilities for demanding test instrumentation environments on airborne, shipboard or mobile ground vehicles.

With multiple time sources and outputs the iES-6/8 provides end node device time signals. iES-6/8 contains a hardware based IEEE-1588v2 time engine able to drive the internal IRIG-A/B/G Time Code Generator (TCG) for time outputs. The IRIG-A/B/G input provides IEEE-1588 Master clock capabilities.

 The iES-12 integrated Ethernet Switch, is a rugged 12 port layer 2/3 managed gigabit Ethernet switch with end node timing and discrete signal capabilities for demanding test instrumentation environments on airborne, shipboard or mobile ground vehicles.

Switch traffic filtering capabilities include; Port User Limit Control, VLAN/ MAC Address (Static MAC Table), Packet/Bit Rate Limiters, Port Based and Frame Type and IP Filtering (ACL, Static/Dynamic Multicast). Audio Video Bridging (AVB) capability is also supported.

A programmable FPGA tied directly into the switch with two 1G interfaces provides line-rate packet processing capabilities. The FPGA also provides built-in IRIG 106 Chapter 7 PCM encoding & decoding. This allows PCM output of VLAN, mirrored or filtered Ethernet switch traffic or from the PCM input decoded Ethernet back out the switch Ethernet ports. Discrete outputs (programmable or data driven) can be used to control end node devices, on or off the network, as well as feedback into the iES-12 from discrete inputs.

With multiple time sources and outputs, the iES-12 provides end node device IRIG time signals. iES-12 contains a high time accuracy internal GPS receiver & a hardware based IEEE-1588v2 time engine both able to drive the internal IRIG-A/B/G Time Code Generator for time outputs. The IEEE-1588v2 time engine provides 1-4 independent clocks (ordinary, boundary, transparent, 1/2 step, peer-to-peer or end-to-end).

The iES-16 integrated Ethernet Switch, is a rugged 16 port layer 2/3 managed gigabit Ethernet switch with end node timing and discrete signal capabilities for demanding test instrumentation environments on airborne, shipboard or mobile ground vehicles. 

Switch traffic filtering capabilities include Port User Limit Control, VLAN/ MAC Address (Static MAC Table), Packet/Bit Rate Limiters, Port Based and Frame Type and IP Filtering (ACL, Static/Dynamic Multicast). Audio Video Bridging (AVB) capability is also supported.

A programmable FPGA tied directly into the switch with two 1G interfaces provides line-rate packet processing capabilities. The FPGA also provides built-in IRIG 106 Chapter 7 PCM encoding & decoding. This allows PCM output of VLAN, mirrored or filtered Ethernet switch traffic or from the PCM input decoded Ethernet back out the switch Ethernet ports. Discrete outputs (programmable or data driven) can be used to control end node devices, on or off the network, as well as feedback into the iES-16 from discrete inputs.

With multiple time sources and outputs, the iES-16 provides end node device IRIG time signals. iES-16 contains a high time accuracy internal GPS receiver & a hardware-based IEEE-1588v2 time engine able to drive the internal IRIG-A/B/G Time Code Generator for time outputs. The IEEE-1588v2 time engine provides 1-4 independent clocks (ordinary, boundary, transparent, 1/2 step, peer-to-peer or end-to-end).

The iES-16 integrated Ethernet Switch, is a rugged 16 port layer 2/3 managed gigabit Ethernet switch with end node timing and discrete signal capabilities for demanding test instrumentation environments on airborne, shipboard or mobile ground vehicles. 

Switch traffic filtering capabilities include Port User Limit Control, VLAN/ MAC Address (Static MAC Table), Packet/Bit Rate Limiters, Port Based and Frame Type and IP Filtering (ACL, Static/Dynamic Multicast). Audio Video Bridging (AVB) capability is also supported.

A programmable FPGA tied directly into the switch with two 1G interfaces provides line-rate packet processing capabilities. The FPGA also provides built-in IRIG 106 Chapter 7 PCM encoding & decoding. This allows PCM output of VLAN, mirrored or filtered Ethernet switch traffic or from the PCM input decoded Ethernet back out the switch Ethernet ports. Discrete outputs (programmable or data driven) can be used to control end node devices, on or off the network, as well as feedback into the iES-16 from discrete inputs.

With multiple time sources and outputs, the iES-16 provides end node device IRIG time signals. iES-16 contains a high time accuracy internal GPS receiver & a hardware-based IEEE-1588v2 time engine able to drive the internal IRIG-A/B/G Time Code Generator for time outputs. The IEEE-1588v2 time engine provides 1-4 independent clocks (ordinary, boundary, transparent, 1/2 step, peer-to-peer or end-to-end).

 The iGU instrumentation Gateway Unit (iGU) is a configurable IRIG 106 Chapter 10 & 7 gateway that lives between instrumentation systems, Ethernet networks and telemetry transmitters. The iGU contains a hardware-based IEEE-1588v2 time engine, a 1PPS output from the 1588 time and IRIG Time Code Generator.

This small self-contained ruggedized unit, contains a layer 2/3 managed Ethernet switch, FPGA and quad-core ARM CPU which allows flexibility in data processing and protocol transforms. The FPGA can be customized to process proprietary Ethernet data streams and output them as Chapter 10. Also, the iGU provides built-in IRIG 106 Chapter 7-15 PCM conversion which allows the unit to function as an Ethernet-to-telemetry encoder and telemetry-to-Ethernet decoder.

Also check out the new uGU – Chapter 7 Mirco Gateway Unit

The μGU Micro Gateway Unit is a configurable IRIG 106 Chapter 7 gateway that lives between instrumentation systems, Ethernet networks and telemetry transmitters.

This small self-contained ruggedized unit, contains 2 10/100 Ethernet ports, 2 PCM ports (up to 25Mbps) and an FPGA processor. The FPGA provides IRIG 106
Chapter 7-15 PCM processing which allows the unit to function as an
Ethernet-to-telemetry encoder and telemetry-to-Ethernet decoder.

Also checkout the iGU – instrumentation Gateway Unit

 The Remote TAP & Aggregation Gateway, RTAG, is a multi-purposed TAP and or Aggregator. Its ruggedized form factor is well suited for installation locations remote of data recorders. As an extension of the MITR, RTAG shares most of the design, logic and firmware with the MITR’s TAP Interface Module (TIM). 

The RTAG provides multiple TAPs for optical or copper links and is available in several configurations: A 1-5G Optical (Ethernet & Fibre Channel) with 8 channels of Tx/Rx TAP’s & 8 channels Tx outputs, a 1G Copper Fibre Channel with 4 channels Tx/Rx TAP’s & 4 optical channels Tx outputs and a 1-10G Optical (Ethernet & Fibre Channel) with 8 channels Tx/Rx TAP’s & 8 channel Tx outputs.

RTAG contains the ability to store up to (8) configurations that are selectable with either CLI commands or the (3) discrete input lines. RTAG can increase the number of data streams per transmit channel with programmable aggregation. The receive side of each TAP’s can either be passed-thru one-to-one to the transmit outputs, can be aggregated from multiple TAP’s to one or more transmit outputs (as programmed by the user) or filtered before the transmit outputs and PCM encoding. The figures below detail the RTAG in “breakout/monitor” and “aggregation” modes.